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OvmfPkg/PlatformInitLib.h: Add QEMU_FW_CFG_CACHE_WORK_AREA

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Add QEMU_FW_CFG_CACHE_WORK_AREA in EFI_HOB_PLATFORM_INFO
to support reading from cache in QemuFwCfgLib.

Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Elena Reshetova <elena.reshetova@intel.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
This commit is contained in:
Ceping Sun
2025-03-17 21:42:44 -04:00
committed by mergify[bot]
parent 151326e542
commit f66078a713
1 changed files with 46 additions and 33 deletions
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79
OvmfPkg/Include/Library/PlatformInitLib.h
View File

@@ -12,50 +12,63 @@
#include <PiPei.h>
#pragma pack(1)
/*
The work area is used to support reading from cache in QemuFwCfgLib.
It is also used as global variable in Dxe phase.
*/
typedef struct {
EFI_HOB_GUID_TYPE GuidHeader;
UINT16 HostBridgeDevId;
UINT16 FwCfgItem;
UINT32 Offset;
BOOLEAN Reading;
} QEMU_FW_CFG_CACHE_WORK_AREA;
UINT64 PcdConfidentialComputingGuestAttr;
BOOLEAN SevEsIsEnabled;
typedef struct {
EFI_HOB_GUID_TYPE GuidHeader;
UINT16 HostBridgeDevId;
UINT32 BootMode;
BOOLEAN S3Supported;
UINT64 PcdConfidentialComputingGuestAttr;
BOOLEAN SevEsIsEnabled;
BOOLEAN SmmSmramRequire;
BOOLEAN Q35SmramAtDefaultSmbase;
UINT16 Q35TsegMbytes;
UINT32 BootMode;
BOOLEAN S3Supported;
UINT32 LowMemory;
UINT64 FirstNonAddress;
UINT8 PhysMemAddressWidth;
UINT32 Uc32Base;
UINT32 Uc32Size;
BOOLEAN SmmSmramRequire;
BOOLEAN Q35SmramAtDefaultSmbase;
UINT16 Q35TsegMbytes;
BOOLEAN PcdSetNxForStack;
UINT64 PcdTdxSharedBitMask;
UINT32 LowMemory;
UINT64 FirstNonAddress;
UINT8 PhysMemAddressWidth;
UINT32 Uc32Base;
UINT32 Uc32Size;
UINT64 PcdPciMmio64Base;
UINT64 PcdPciMmio64Size;
BOOLEAN PcdPciMmio64Override;
UINT32 PcdPciMmio32Base;
UINT32 PcdPciMmio32Size;
UINT64 PcdPciIoBase;
UINT64 PcdPciIoSize;
BOOLEAN PcdSetNxForStack;
UINT64 PcdTdxSharedBitMask;
UINT64 PcdEmuVariableNvStoreReserved;
UINT32 PcdCpuBootLogicalProcessorNumber;
UINT32 PcdCpuMaxLogicalProcessorNumber;
UINT32 DefaultMaxCpuNumber;
UINT64 PcdPciMmio64Base;
UINT64 PcdPciMmio64Size;
BOOLEAN PcdPciMmio64Override;
UINT32 PcdPciMmio32Base;
UINT32 PcdPciMmio32Size;
UINT64 PcdPciIoBase;
UINT64 PcdPciIoSize;
UINT32 S3AcpiReservedMemoryBase;
UINT32 S3AcpiReservedMemorySize;
UINT64 PcdEmuVariableNvStoreReserved;
UINT32 PcdCpuBootLogicalProcessorNumber;
UINT32 PcdCpuMaxLogicalProcessorNumber;
UINT32 DefaultMaxCpuNumber;
UINT64 FeatureControlValue;
UINT32 S3AcpiReservedMemoryBase;
UINT32 S3AcpiReservedMemorySize;
BOOLEAN QemuFwCfgChecked;
BOOLEAN QemuFwCfgSupported;
BOOLEAN QemuFwCfgDmaSupported;
UINT64 FeatureControlValue;
BOOLEAN QemuFwCfgChecked;
BOOLEAN QemuFwCfgSupported;
BOOLEAN QemuFwCfgDmaSupported;
QEMU_FW_CFG_CACHE_WORK_AREA QemuFwCfgCacheWorkArea;
} EFI_HOB_PLATFORM_INFO;
#pragma pack()