ArmPlatformPkg: Capture TransferList information for PeilessSec

Capture TransferList address from register x3
Refer to section 3 of the FW Handoff Specification
https://firmwarehandoff.github.io/firmware_handoff
The TransferList header is present at the base address
captured by this variable.
For platforms with no TransferList support,
boot continues without any errors.

Signed-off-by: Prachotan Reddy Bathi <Prachotan.Bathi@arm.com>

ArmPlatformPkg/ArmPlatformPkg.dsc

@@ -70,6 +70,7 @@
   UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
   DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
   UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+  ArmTransferListLib|ArmPkg/Library/ArmTransferListLib/ArmTransferListLib.inf
 
 [LibraryClasses.common.PEIM]
   HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf

ArmPlatformPkg/PeilessSec/AArch64/ModuleEntryPoint.S

@@ -1,13 +1,29 @@
 //
-//  Copyright (c) 2011 - 2020, Arm Limited. All rights reserved.<BR>
+//  Copyright (c) 2011 - 2025, Arm Limited. All rights reserved.<BR>
 //
 //  SPDX-License-Identifier: BSD-2-Clause-Patent
 //
+// @Par Reference(s):
+// - Firmware Handoff specification [https://firmwarehandoff.github.io/firmware_handoff/main]
 //
 
 #include <AsmMacroLib.h>
 
 ASM_FUNC(_ModuleEntryPoint)
+
+  // Check if register assignment at handoff matches spec
+  MOV64 (x4, 0x14a0fb10b)
+  cmp   x1, x4
+  // Skip TransferList init if x1 is not equal to the TransferList signature
+  b.ne  _SkipTransferList
+
+  // Skip TransferList init if x2 is not equal to 0
+  cbnz  x2, _SkipTransferList
+
+  // Set the TransferList Base Address from register x3
+  mov   x6, x3
+
+_SkipTransferList:
   // Do early platform specific actions
   bl    ASM_PFX(ArmPlatformPeiBootAction)
 
@@ -76,6 +92,8 @@ _GetStackBase:
   MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
   sub   x1, x1, x2
 
+  // Pass Transfer List Base Address
+  mov   x2, x6
   // Move sec startup address into a data register
   // Ensure we're jumping to FV version of the code (not boot remapped alias)
   ldr   x4, =ASM_PFX(CEntryPoint)

ArmPlatformPkg/PeilessSec/PeilessSec.c

@@ -53,13 +53,15 @@ GetPlatformPpi (
   @param[in]  UefiMemoryBase  Start of the PI/UEFI memory region
   @param[in]  StackBase      Start of the stack
   @param[in]  StartTimeStamp  Timer value at start of execution
+  @param[in]  TransferListBaseAddr  Base address of the Transfer List
 **/
 STATIC
 VOID
 SecMain (
   IN  UINTN   UefiMemoryBase,
   IN  UINTN   StackBase,
-  IN  UINT64  StartTimeStamp
+  IN  UINT64  StartTimeStamp,
+  IN  UINTN   TransferListBaseAddr
   )
 {
   EFI_HOB_HANDOFF_INFO_TABLE  *HobList;
@@ -71,6 +73,7 @@ SecMain (
   UINTN                       CharCount;
   UINTN                       StacksSize;
   FIRMWARE_SEC_PERFORMANCE    Performance;
+  VOID                        *TransferListBase;
 
   // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)
   ASSERT (
@@ -134,6 +137,20 @@ SecMain (
     }
   }
 
+  // Dump the Transfer List
+  TransferListBase = (VOID *)TransferListBaseAddr;
+  if (TransferListBase != NULL) {
+    if (TransferListCheckHeader (TransferListBase) != TRANSFER_LIST_OPS_INVALID) {
+      DEBUG_CODE_BEGIN ();
+      TransferListDump (TransferListBase);
+      DEBUG_CODE_END ();
+    } else {
+      DEBUG ((DEBUG_ERROR, "%a: No valid operations possible on TransferList found @ 0x%p\n", __func__, TransferListBase));
+    }
+  } else {
+    DEBUG ((DEBUG_INFO, "%a: No TransferList found, continuing boot\n", __func__));
+  }
+
   // Store timer value logged at the beginning of firmware image execution
   Performance.ResetEnd = GetTimeInNanoSecond (StartTimeStamp);
 
@@ -167,11 +184,13 @@ SecMain (
 
   @param[in]  UefiMemoryBase  Start of the PI/UEFI memory region
   @param[in]  StackBase       Start of the stack
+  @param[in]  TransferListBaseAddr  Base address of the Transfer List
 **/
 VOID
 CEntryPoint (
   IN  UINTN  UefiMemoryBase,
-  IN  UINTN  StackBase
+  IN  UINTN  StackBase,
+  IN  UINTN  TransferListBaseAddr
   )
 {
   UINT64  StartTimeStamp;
@@ -198,7 +217,7 @@ CEntryPoint (
     FixedPcdGet32 (PcdSystemMemoryUefiRegionSize)
     );
 
-  SecMain (UefiMemoryBase, StackBase, StartTimeStamp);
+  SecMain (UefiMemoryBase, StackBase, StartTimeStamp, TransferListBaseAddr);
 
   // DXE Core should always load and never return
   ASSERT (FALSE);

ArmPlatformPkg/PeilessSec/PeilessSec.h

@@ -24,6 +24,7 @@
 #include <Library/PrintLib.h>
 #include <Library/SerialPortLib.h>
 #include <Library/TimerLib.h>
+#include <Library/ArmTransferListLib.h>
 
 #include <Ppi/ArmMpCoreInfo.h>
 #include <Ppi/GuidedSectionExtraction.h>

ArmPlatformPkg/PeilessSec/PeilessSec.inf

@@ -52,6 +52,7 @@
   SerialPortLib
   TimerLib
   StackCheckLib
+  ArmTransferListLib
 
 [Ppis]
   gArmMpCoreInfoPpiGuid