14c9ba1a2c
A potential issue may happen when FSP creates/changes page table while bootloader doesn't expect page table being changed in FSP. Current, FSP API support to save/restore stack, IDT and general purpose registers. Following the same pattern, add save/restore page table support to solve this issue. Note that this feature only impacts FSP API mode, and is controlled by PCD PcdFspSaveRestorePageTableEnable. For compatibility, the PCD default value is set as FALSE. Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
133 lines
6.0 KiB
Plaintext
133 lines
6.0 KiB
Plaintext
## @file
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# Provides driver and definitions to build fsp in EDKII bios.
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#
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# Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = IntelFsp2Pkg
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PACKAGE_GUID = A8C53B5E-D556-4F3E-874D-0D6FA2CDC7BF
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PACKAGE_VERSION = 0.1
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[Includes]
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Include
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[LibraryClasses]
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## @libraryclass Provides cache-as-ram support.
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CacheAsRamLib|Include/Library/CacheAsRamLib.h
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## @libraryclass Provides cache setting on MTRR.
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CacheLib|Include/Library/CacheLib.h
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## @libraryclass Provides debug device abstraction.
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DebugDeviceLib|Include/Library/DebugDeviceLib.h
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## @libraryclass Provides FSP related services.
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FspCommonLib|Include/Library/FspCommonLib.h
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## @libraryclass Provides FSP platform related actions.
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FspPlatformLib|Include/Library/FspPlatformLib.h
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## @libraryclass Provides FSP switch stack function.
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FspSwitchStackLib|Include/Library/FspSwitchStackLib.h
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## @libraryclass Provides FSP platform sec related actions.
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FspSecPlatformLib|Include/Library/FspSecPlatformLib.h
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## @libraryclass Provides FSP MultiPhase service functions.
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FspMultiPhaseLib|Include/Library/FspMultiPhaseLib.h
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[Ppis]
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#
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# PPI to indicate FSP is ready to enter notify phase
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# This provides flexibility for any late initialization that must be done right before entering notify phase.
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#
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gFspReadyForNotifyPhasePpiGuid = { 0xcd167c1e, 0x6e0b, 0x42b3, {0x82, 0xf6, 0xe3, 0xe9, 0x06, 0x19, 0x98, 0x10}}
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#
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# PPI as dependency on some modules which only required for API mode
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#
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gFspInApiModePpiGuid = { 0xa1eeab87, 0xc859, 0x479d, {0x89, 0xb5, 0x14, 0x61, 0xf4, 0x06, 0x1a, 0x3e}}
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#
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# PPI for Architectural configuration data for FSP-M
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#
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gFspmArchConfigPpiGuid = { 0x824d5a3a, 0xaf92, 0x4c0c, {0x9f, 0x19, 0x19, 0x52, 0x6d, 0xca, 0x4a, 0xbb}}
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#
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# PPI to tear down the temporary memory set up by TempRamInit ().
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#
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gFspTempRamExitPpiGuid = { 0xbc1cfbdb, 0x7e50, 0x42be, {0xb4, 0x87, 0x22, 0xe0, 0xa9, 0x0c, 0xb0, 0x52}}
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#
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# PPI for Variable Services
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#
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gEdkiiPeiVariablePpiGuid = { 0xe7b2cd04, 0x4b14, 0x44c2, {0xb7, 0x48, 0xce, 0xaf, 0x2b, 0x66, 0x4a, 0xb0}}
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[Guids]
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#
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# GUID defined in package
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#
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gIntelFsp2PkgTokenSpaceGuid = { 0xed6e0531, 0xf715, 0x4a3d, { 0x9b, 0x12, 0xc1, 0xca, 0x5e, 0xf6, 0x98, 0xa2 } }
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# Guid define in FSP EAS
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gFspHeaderFileGuid = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }
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gFspReservedMemoryResourceHobGuid = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }
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gFspNonVolatileStorageHob2Guid = { 0x4866788f, 0x6ba8, 0x47d8, { 0x83, 0x06, 0xac, 0xf7, 0x7f, 0x55, 0x10, 0x46 } }
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gFspNonVolatileStorageHobGuid = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }
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gFspBootLoaderTolumHobGuid = { 0x73ff4f56, 0xaa8e, 0x4451, { 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44 } } # FSP EAS v1.1
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gFspPerformanceDataGuid = { 0x56ed21b6, 0xba23, 0x429e, { 0x89, 0x32, 0x37, 0x6d, 0x8e, 0x18, 0x2e, 0xe3 } }
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gFspEventEndOfFirmwareGuid = { 0xbd44f629, 0xeae7, 0x4198, { 0x87, 0xf1, 0x39, 0xfa, 0xb0, 0xfd, 0x71, 0x7e } }
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[PcdsFixedAtBuild]
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gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress |0xFED00108|UINT32|0x00000001
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gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase |0xFEF00000|UINT32|0x10001001
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gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize | 0x2000|UINT32|0x10001002
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gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0x1000|UINT32|0x10001003
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gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize | 0x100|UINT32|0x10001004
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gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry | 32|UINT32|0x00002001
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gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry | 6|UINT32|0x00002002
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gIntelFsp2PkgTokenSpaceGuid.PcdFspAreaBaseAddress |0xFFF80000|UINT32|0x10000001
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gIntelFsp2PkgTokenSpaceGuid.PcdFspAreaSize |0x00040000|UINT32|0x10000002
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gIntelFsp2PkgTokenSpaceGuid.PcdFspBootFirmwareVolumeBase|0xFFF80000|UINT32|0x10000003
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gIntelFsp2PkgTokenSpaceGuid.PcdFspHeaderSpecVersion | 0x20| UINT8|0x00000002
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#
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# x % of FSP temporary memory will be used for heap
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# (100 - x) % of FSP temporary memory will be used for stack
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# 0 means FSP will share the stack with boot loader and FSP temporary memory is heap
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# Note: This mode assumes boot loader stack is large enough for FSP to use.
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#
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gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage | 50| UINT8|0x10000004
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#
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# Maximal Interrupt supported in IDT table.
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#
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gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxInterruptSupported | 34| UINT8|0x10000005
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#
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# Allows FSP-M to reserve a section of Temporary RAM for implementation specific use.
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# Reduces the amount of memory available for the PeiCore heap.
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#
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gIntelFsp2PkgTokenSpaceGuid.PcdFspPrivateTemporaryRamSize |0x00000000|UINT32|0x10000006
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[PcdsFeatureFlag]
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#
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# Indicates if the FSP will save and restore page table. Only works in FSP API mode
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# TRUE - FSP will save and restore page table
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# FALSE - FSP will not save and restore page table
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#
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gIntelFsp2PkgTokenSpaceGuid.PcdFspSaveRestorePageTableEnable |FALSE|BOOLEAN|0x10000007
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[PcdsFixedAtBuild,PcdsDynamic,PcdsDynamicEx]
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gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedMemoryLength |0x00100000|UINT32|0x46530000
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gIntelFsp2PkgTokenSpaceGuid.PcdBootLoaderEntry |0xFFFFFFE4|UINT32|0x46530100
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#
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# Different FSP Components may have different NumberOfPhases which can be defined
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# by each FspSecCore module from DSC.
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#
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gIntelFsp2PkgTokenSpaceGuid.PcdMultiPhaseNumberOfPhases |0x00000000|UINT32|0x46530101
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