6952d1fa90
UEFI defines that FP support is required on AArch64, whereas many platforms enable it anyway on Arm. But when it's enabled, C code can generate instructions targeting FP registers, so: - move ArmEnableVFP call to asm - make it unconditional on AArch64 Signed-off-by: Leif Lindholm <leif.lindholm@oss.qualcomm.com>
47 lines
1.3 KiB
ArmAsm
47 lines
1.3 KiB
ArmAsm
//
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// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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//
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// SPDX-License-Identifier: BSD-2-Clause-Patent
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//
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//
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#include <AsmMacroLib.h>
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ASM_FUNC(_ModuleEntryPoint)
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// Do early platform specific actions
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bl ASM_PFX(ArmPlatformPeiBootAction)
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#if (FixedPcdGet32 (PcdVFPEnabled))
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// Enable Floating Point. This needs to be done before entering C code, which
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// may use FP/SIMD registers.
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bl ArmEnableVFP
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#endif
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// Get the top of the primary stacks (and the base of the secondary stacks)
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MOV32 (r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
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// Set up the stack pointer
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mov sp, r1
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// Apply the init value to the entire stack
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MOV32 (r8, FixedPcdGet64 (PcdCPUCoresStackBase))
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MOV32 (r9, FixedPcdGet32 (PcdInitValueInTempStack))
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mov r10, r9
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mov r11, r9
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mov r12, r9
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0:stm r8!, {r9-r12}
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cmp r8, r1
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blt 0b
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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MOV32 (r2, FixedPcdGet32(PcdFvBaseAddress))
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ldr r0, [r2, #4]
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// Move sec startup address into a data register
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// Ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r3, =ASM_PFX(CEntryPoint)
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// Jump to PrePeiCore C code
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// r0 = pei_core_address
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blx r3
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