Files
John Mathews d2d8d38ee0 UefiCpuPkg/PiSmmCpuDxeSmm: Safe handling of IDT register on SMM entry
Mitigates CVE-2025-3770

Do not assume that IDT.limit is loaded with a zero value upon SMM entry.
Delay enabling Machine Check Exceptions in SMM until after the SMM IDT
has been reloaded.

Signed-off-by: John Mathews <john.mathews@intel.com>
2025-08-04 08:15:19 -07:00
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