Fix memory leaks by adding missing FreePool calls:
release SpiHcHandles in SpiBusEntry exit path.
REF: https://uefi.org/sites/default/files/resources/UEFI_Spec_Final_2.11.pdf
Chapter 7.3.15: "Services - Boot Services.LocateHandleBuffer":
It is the caller's responsibility to call the Boot Service.FreePool when
the caller no longer requires the contents of Buffer.
Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
The pointer `Instance->SfdpBasicFlash` can be used before initializing.
Example code flow:
- CreateSpiNorFlashSfdpInstance: Allocate pool for `Instance`
- InitialSpiNorFlashSfdpInstance
- ReadSfdp
- ReadSfdpHeader
- FillWriteBuffer: Dereferencing
`Instance->SfdpBasicFlash`
- ReadSfdpBasicParameterTable: Allocate pool for
`Instance->SfdpBasicFlash`
Check both `Instance` and `Instance->SfdpBasicFlash` should have
a non null value before dereferencing it. Otherwise use the defaut
value 0.
Also terminate the function if `Instance` or `WriteBuffer` is NULL.
Signed-off-by: Paddy Deng <v-paddydeng@microsoft.com>
Added SpiHc DXE and SMM drivers. This code receives bus transactions
from the SpiBus layer and passes them onto the SpiHcPlatformLib
Platform Initialization Spec 1.7 volume 5 section 18.1.7
Bugzilla #4753
Cc: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Signed-off-by: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Added SpiBus DXE and SMM drivers. This code translates SPI requests from
the application layer into SPI Bus transactions on the SPI host
controller. The code is responsible for checking if the transaction is
valid, then setting up the SPI clock and chip select properly before
passing the bus transaction to the host controller.
Platform Initialization Spec 1.7 volume 5 section 18.1.6
Bugzilla #4753
Cc: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Signed-off-by: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
