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MdePkg: Add additional PCIe extended capabilities

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Changes applied to appropriate PCIExpress
header files based on the specification.

Signed-off-by: Cian Costello <ccostello@nvidia.com>
This commit is contained in:
Cian Costello
2025-04-18 22:46:34 +00:00
committed by mergify[bot]
parent 98351bb0d9
commit aa32d2cfc2
6 changed files with 314 additions and 1 deletions
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36
MdePkg/Include/IndustryStandard/PciExpress21.h
View File

@@ -436,6 +436,9 @@ typedef struct {
#define EFI_PCIE_CAPABILITY_ID_SRIOV 0x10
#define EFI_PCIE_CAPABILITY_ID_MRIOV 0x11
#define PCI_EXPRESS_EXTENDED_CAPABILITY_SRIOV_ID 0x0010
#define PCI_EXPRESS_EXTENDED_CAPABILITY_SRIOV_VER1 0x1
typedef struct {
UINT32 CapabilityHeader;
UINT32 Capability;
@@ -736,6 +739,39 @@ typedef struct {
#define GET_TPH_TABLE_SIZE(x) ((x->TphRequesterCapability & 0x7FF0000)>>16) * sizeof(UINT16)
/// Address Translation Services Extended Capability Structure
///
/// Based on section 5.1 of PCI Express Address Translation Services Specification 1.1
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_ATS_ID 0x000F
#define PCI_EXPRESS_EXTENDED_CAPABILITY_ATS_VER1 0x1
typedef union {
struct {
UINT16 InvalidateQueueDepth : 5;
UINT16 Reserved : 9;
UINT16 GlobalInvalidateSupported : 1;
UINT16 Reserved2 : 1;
} Bits;
UINT16 Uint16;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_ATS_CAPABILITY;
typedef union {
struct {
UINT16 EnableATS : 1;
UINT16 GlobalInvalidate : 1;
UINT16 Reserved : 14;
} Bits;
UINT16 Uint16;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_ATS_CONTROL;
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
PCI_EXPRESS_EXTENDED_CAPABILITIES_ATS_CAPABILITY Capability;
PCI_EXPRESS_EXTENDED_CAPABILITIES_ATS_CONTROL Control;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_ATS;
///@}
#pragma pack()
#endif

38
MdePkg/Include/IndustryStandard/PciExpress30.h
View File

@@ -46,6 +46,44 @@ typedef struct {
PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL EqualizationControl[2];
} PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE;
/// VF Resizable BAR Extended Capability Structure
///
/// Based on section 7.22 of PCI Express Base Specification 3.0
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_VF_RESIZABLE_BAR_ID 0x0024
#define PCI_EXPRESS_EXTENDED_CAPABILITY_VF_RESIZABLE_BAR_VER1 0x1
typedef union {
struct {
UINT32 Reserved : 4;
UINT32 VfBarSizeCapability : 28;
} Bits;
UINT32 Uint32;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_VF_RESIZABLE_BAR_CAPABILITY;
typedef union {
struct {
UINT32 VfBarIndex : 3;
UINT32 Reserved : 2;
UINT32 VfResizableBarNumber : 3;
UINT32 VfBarSize : 6;
UINT32 Reserved2 : 2;
UINT32 VfBarSizeCapability : 16;
} Bits;
UINT32 Uint32;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_VF_RESIZABLE_BAR_CONTROL;
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_VF_RESIZABLE_BAR_CAPABILITY VfResizableBarCapability;
PCI_EXPRESS_EXTENDED_CAPABILITIES_VF_RESIZABLE_BAR_CONTROL VfResizableBarControl;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_VF_RESIZABLE_BAR_ENTRY;
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
PCI_EXPRESS_EXTENDED_CAPABILITIES_VF_RESIZABLE_BAR_ENTRY Capability[1];
} PCI_EXPRESS_EXTENDED_CAPABILITIES_VF_RESIZABLE_BAR;
///@}
#pragma pack()
#endif

36
MdePkg/Include/IndustryStandard/PciExpress31.h
View File

@@ -67,6 +67,42 @@ typedef struct {
PCI_EXPRESS_REG_L1_PM_SUBSTATES_CONTROL2 Control2;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_L1_PM_SUBSTATES;
/// Process Address Space ID Extended Capability Structure
///
/// Based on section 7.29 of PCI Express Base Specification 3.1
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_PASID_ID 0x001B
#define PCI_EXPRESS_EXTENDED_CAPABILITY_PASID_VER1 0x1
typedef union {
struct {
UINT16 PasidSupport : 1;
UINT16 ExecutePermissionSupport : 1;
UINT16 PrivilegedModeSupport : 1;
UINT16 Reserved1 : 5;
UINT16 MaxPasidWidth : 5;
UINT16 Reserved2 : 3;
} Bits;
UINT16 Uint16;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_PASID_CAPABILITY;
typedef union {
struct {
UINT16 PasidEnable : 1;
UINT16 ExecutePermissionEnable : 1;
UINT16 PrivilegedModeEnable : 1;
UINT16 Reserved : 13;
} Bits;
UINT16 Uint16;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_PASID_CONTROL;
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
PCI_EXPRESS_EXTENDED_CAPABILITIES_PASID_CAPABILITY Capability;
PCI_EXPRESS_EXTENDED_CAPABILITIES_PASID_CONTROL Control;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_PASID;
///@}
#pragma pack()
#endif

127
MdePkg/Include/IndustryStandard/PciExpress40.h
View File

@@ -80,9 +80,11 @@ typedef struct {
///@}
/// The Designated Vendor Specific Capability definitions
///
/// Based on section 7.9.6 of PCI Express Base Specification 4.0.
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_DESIGNATED_VENDOR_SPECIFIC_ID 0x0023
#define PCI_EXPRESS_EXTENDED_CAPABILITY_DESIGNATED_VENDOR_SPECIFIC_ID 0x0023
#define PCI_EXPRESS_EXTENDED_CAPABILITY_DESIGNATED_VENDOR_SPECIFIC_VER1 0x1
typedef union {
struct {
@@ -108,6 +110,129 @@ typedef struct {
} PCI_EXPRESS_EXTENDED_CAPABILITIES_DESIGNATED_VENDOR_SPECIFIC;
///@}
/// Data Link Feature Extended Capability Structure
///
/// Based on section 7.7.4 of PCI Express Base Specification 4.0
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_DATA_LINK_FEATURE_ID 0x0025
#define PCI_EXPRESS_EXTENDED_CAPABILITY_DATA_LINK_FEATURE_VER1 0x1
typedef union {
struct {
UINT32 Reserved1 : 1;
UINT32 ScrambleDisableSupported : 1;
UINT32 Reserved2 : 30;
} Bits;
UINT32 Uint32;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_DATA_LINK_FEATURE_CAPABILITY;
typedef union {
struct {
UINT32 Reserved1 : 1;
UINT32 ScrambleDisable : 1;
UINT32 Reserved2 : 30;
} Bits;
UINT32 Uint32;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_DATA_LINK_FEATURE_CONTROL;
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
PCI_EXPRESS_EXTENDED_CAPABILITIES_DATA_LINK_FEATURE_CAPABILITY Capability;
PCI_EXPRESS_EXTENDED_CAPABILITIES_DATA_LINK_FEATURE_CONTROL Control;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_DATA_LINK_FEATURE;
///@}
/// Lane Margining at Receiver Extended Capability Structure
///
/// Based on section 7.7.6 of PCI Express Base Specification 4.0
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_LANE_MARGINING_AT_RECEIVER_ID 0x0027
#define PCI_EXPRESS_EXTENDED_CAPABILITY_LANE_MARGINING_AT_RECEIVER_VER1 0x1
typedef union {
struct {
UINT8 MaxLaneNumber : 5;
UINT8 Reserved : 3;
} Bits;
UINT8 Uint8;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_LANE_MARGINING_CAPABILITY;
typedef union {
struct {
UINT8 LaneNumber : 5;
UINT8 RcvErrorCounterSelect : 2;
UINT8 LaneMarginStepSelect : 1;
} Bits;
UINT8 Uint8;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_LANE_MARGINING_CONTROL;
typedef union {
struct {
UINT8 MaxLanesReceivingTestPattern : 5;
UINT8 Reserved : 3;
} Bits;
UINT8 Uint8;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_LANE_MARGINING_STATUS;
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
PCI_EXPRESS_EXTENDED_CAPABILITIES_LANE_MARGINING_CAPABILITY Capability;
PCI_EXPRESS_EXTENDED_CAPABILITIES_LANE_MARGINING_CONTROL Control;
PCI_EXPRESS_EXTENDED_CAPABILITIES_LANE_MARGINING_STATUS Status;
UINT32 ErrorCounter;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_LANE_MARGINING_AT_RECEIVER;
///@}
/// Page Request Interface Extended Capability Structure
///
/// Based on section 10.5.2 of PCI Express Base Specification 4.0
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_PRI_ID 0x0013
#define PCI_EXPRESS_EXTENDED_CAPABILITY_PRI_VER1 0x1
typedef union {
struct {
UINT32 PriRequestCapable : 1;
UINT32 PriCompletionCapable : 1;
UINT32 Page256RequestCapable : 1;
UINT32 Page512RequestCapable : 1;
UINT32 Page1KRequestCapable : 1;
UINT32 Page2KRequestCapable : 1;
UINT32 Page4KRequestCapable : 1;
UINT32 Page8KRequestCapable : 1;
UINT32 Reserved : 24;
} Bits;
UINT32 Uint32;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_PRI_CAPABILITY;
typedef union {
struct {
UINT32 PriEnable : 1;
UINT32 PriReset : 1;
UINT32 Reserved : 30;
} Bits;
UINT32 Uint32;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_PRI_CONTROL;
typedef union {
struct {
UINT32 OutstandingPageRequest : 1;
UINT32 ResponseFailure : 1;
UINT32 Stopped : 1;
UINT32 PpRqIdParity : 1;
UINT32 Reserved : 28;
} Bits;
UINT32 Uint32;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_PRI_STATUS;
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
PCI_EXPRESS_EXTENDED_CAPABILITIES_PRI_CAPABILITY Capability;
PCI_EXPRESS_EXTENDED_CAPABILITIES_PRI_CONTROL Control;
PCI_EXPRESS_EXTENDED_CAPABILITIES_PRI_STATUS Status;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_PRI;
///@}
#pragma pack()
#endif

15
MdePkg/Include/IndustryStandard/PciExpress50.h
View File

@@ -131,6 +131,21 @@ typedef struct {
} PCI_EXPRESS_EXTENDED_CAPABILITIES_PHYSICAL_LAYER_32_0;
///@}
/// Alternate Protocol Negotiation Extended Capability Structure
///
/// Based on section 7.9.21 of PCI Express Base Specification 5.0
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_ALTERNATE_PROTOCOL_ID 0x002B
#define PCI_EXPRESS_EXTENDED_CAPABILITY_ALTERNATE_PROTOCOL_VER1 0x1
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
UINT32 AltProtocolCapability;
UINT32 AltProtocolStatus;
UINT32 AltProtocolControl;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_ALTERNATE_PROTOCOL;
///@}
#pragma pack()
#endif

63
MdePkg/Include/IndustryStandard/PciExpress60.h
View File

@@ -116,6 +116,69 @@ typedef union {
UINT32 Uint32;
} PCI_REG_PCIE_DEVICE_STATUS3;
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
PCI_REG_PCIE_DEVICE_CAPABILITY3 Capabilities;
PCI_REG_PCIE_DEVICE_CONTROL3 Control;
PCI_REG_PCIE_DEVICE_STATUS3 Status;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_DEVICE3;
/// Flit Logging Extended Capability Structure
///
/// Based on section 7.7.8 of PCI Express Base Specification 6.0
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_FLIT_LOGGING_ID 0x0032
#define PCI_EXPRESS_EXTENDED_CAPABILITY_FLIT_LOGGING_VER1 0x1
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
UINT32 FlitLoggingCapabilities;
UINT32 FlitLoggingControl;
UINT32 FlitLoggingStatus;
UINT32 FlitMask;
UINT32 FlitErrorData1;
UINT32 FlitErrorData2;
UINT32 FlitErrorData3;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_FLIT_LOGGING;
///@}
/// Data Object Exchange Extended Capability Structure
///
/// Based on section 7.9.24 of PCI Express Base Specification 6.0
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_DATA_OBJECT_EXCHANGE_ID 0x002E
#define PCI_EXPRESS_EXTENDED_CAPABILITY_DATA_OBJECT_EXCHANGE_VER1 0x1
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
UINT32 DoeCapabilities;
UINT16 DoeControl;
UINT16 DoeStatus;
UINT32 UncorrectableErrorMask;
UINT32 UncorrectableErrorSeverity;
UINT32 CorrectableErrorMask;
UINT32 DoeSendObjectControl;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_DATA_OBJECT_EXCHANGE;
///@}
/// Integrity Data Encryption Extended Capability Structure
///
/// Based on section 7.9.26 of PCI Express Base Specification 6.0
///@{
#define PCI_EXPRESS_EXTENDED_CAPABILITY_INTEGRITY_DATA_ENCRYPTION_ID 0x0030
#define PCI_EXPRESS_EXTENDED_CAPABILITY_INTEGRITY_DATA_ENCRYPTION_VER1 0x1
typedef struct {
PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
UINT32 IdeCapabilities;
UINT32 IdeControl;
UINT32 IdeStatus;
UINT32 IdeSendMcCapabilities;
UINT32 IdeSendMcControl;
UINT32 IdeSendMcStatus;
} PCI_EXPRESS_EXTENDED_CAPABILITIES_INTEGRITY_DATA_ENCRYPTION;
///@}
#pragma pack()
#endif