UefiCpuPkg/PiSmmCpuDxeSmm: Correct AllApArrivedWithException flag

Update AllApArrivedWithException if the 1st timeout sync is skipped
but all APs have arrived.

Example:
If IsCpuSyncAlwaysNeeded() returns false, LMCE is enabled and
triggered, and another SMI source combined with LMCE causes all APs
to enter SMI. Then 2nd timeout sync will be also skipped, but all APs
have arrived, so AllApArrivedWithException should be updated before
using.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>

UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c

@@ -318,6 +318,7 @@ SmmWaitForApArrival (
     }
   }
 
+  mSmmMpSyncData->AllApArrivedWithException = AllCpusInSmmExceptBlockedDisabled ();
   if (!mSmmMpSyncData->AllApArrivedWithException) {
     //
     // Check for the Blocked & Delayed Case.