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IntelFsp2Pkg: Preserve GDTR and CS/DS/ES/FS/GS/SS

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Bootloader does not expect FSP modifies GDTR and segment selectors, update
FSP entry/exit code to preserve these registers.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
This commit is contained in:
Ray Ni
2025-07-15 15:41:50 +08:00
committed by mergify[bot]
parent 8be9a344d3
commit 562bce0feb
4 changed files with 81 additions and 4 deletions
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4
IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
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@@ -31,7 +31,9 @@ typedef struct {
} CONTEXT_STACK;
typedef struct {
UINT64 Idtr[2]; // IDTR Limit - bit0:bi15, IDTR Base - bit16:bit79
UINT64 Idtr[2]; // IDTR Limit - bit0:bit15, IDTR Base - bit16:bit79
UINT64 Gdtr[2]; // GDTR Limit - bit0:bit15, GDTR Base - bit16:bit79
UINT64 Segment[6]; // Segment Registers: CS, DS, ES, FS, GS, SS
UINT64 Cr0;
UINT64 Cr3;
UINT64 Cr4;