From 42b30dbc034e6af1d078e81b8381e0e81b06337f Mon Sep 17 00:00:00 2001 From: Sarah Walker Date: Tue, 14 Jan 2025 14:13:04 +0000 Subject: [PATCH] MdePkg: Include: Add defines for AA64PFR2 system register The AA64PFR2 system register is required to detect GICv5 support. Signed-off-by: Sarah Walker --- MdePkg/Include/AArch64/AArch64.h | 13 +++++++------ MdePkg/Include/Library/ArmLib.h | 12 ++++++++++++ 2 files changed, 19 insertions(+), 6 deletions(-) diff --git a/MdePkg/Include/AArch64/AArch64.h b/MdePkg/Include/AArch64/AArch64.h index 4e5830c375..a2c5543837 100644 --- a/MdePkg/Include/AArch64/AArch64.h +++ b/MdePkg/Include/AArch64/AArch64.h @@ -33,6 +33,9 @@ #define AARCH64_PFR0_FP (0xF << 16) #define AARCH64_PFR0_GIC (0xF << 24) +// ID_AA64PFR2 - AArch64 Processor Feature Register 2 definitions +#define AARCH64_PFR2_GCIE (0xF << 12) + // ID_AA64DFR0 - AArch64 Debug Feature Register 0 definitions #define AARCH64_DFR0_TRACEVER (0xFULL << 4) #define AARCH64_DFR0_TRBE (0xFULL << 44) @@ -122,18 +125,16 @@ #define ARM_VECTOR_LOW_A32_FIQ 0x700 #define ARM_VECTOR_LOW_A32_SERR 0x780 -// The ID_AA64ISAR2_EL1 register is not recognized by older -// assemblers, we need to define it here. +// Definitions for ID registers introducted post ARMv8.0 and not +// given symbolic names in all relevant assemblers. #define ID_AA64ISAR2_EL1 S3_0_C0_C6_2 -// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we -// build for ARMv8.0, we need to define the register here. #define ID_AA64MMFR2_EL1 S3_0_C0_C7_2 -// The RNDR register is not recognized by older assemblers, -// so we need to define it here #define RNDR S3_3_C2_C4_0 +#define ID_AA64PFR2_EL1 S3_0_C0_C4_2 + #define VECTOR_BASE(tbl) \ .section .text.##tbl##,"ax"; \ .align 11; \ diff --git a/MdePkg/Include/Library/ArmLib.h b/MdePkg/Include/Library/ArmLib.h index a5823afdb2..52ff1b86b9 100644 --- a/MdePkg/Include/Library/ArmLib.h +++ b/MdePkg/Include/Library/ArmLib.h @@ -699,6 +699,18 @@ ArmHasGicSystemRegisters ( VOID ); +/** + Check whether the CPU supports the GICv5 system register interface + + @return Whether GICv5 System Register Interface is supported + +**/ +BOOLEAN +EFIAPI +ArmHasGicV5SystemRegisters ( + VOID + ); + /** Checks if CCIDX is implemented. @retval TRUE CCIDX is implemented.